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Academia.edu - Share research Skip to main content Academia.edu no longer supports Internet Explorer. To browse Academia.edu and the wider internet faster and more securely, please take a few seconds to upgrade your browser. Log In Sign Up Log In Sign Up more  Job Board About Press Blog People Papers Terms Privacy Copyright  We're Hiring!  Help Center less  Browse By Title: "A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM" to "A 0.3-mW/Ch 1.25 V Piezo-Resistance Digital ROIC for Liquid-Dispensing MEMS" Find papers alphabetically by title. A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM A 0.22 μm CMOS-SOI technology with a Cu BEOL A 0.25-μm SiGe millimeter-wave damping pulse transmitter chip with on-chip loop antenna array A 0.25-µm SiGe Fully Integrated Pulse Transmitter with On-Chip Loop Antenna Array towards Beam-Formability for Millimeter-Wave Active Imaging A 0.25 mm x86 microprocessor with a 100 MHz socket 7 interface A 0.21 μm2 7F2 trench cell with a locally-open globally-folded dual bitline for 1 Gb/4 Gb DRAM A 0.2-μm, 1.8-V, SOI, 550MHZ, 64-b PowerPC microprocessor with copper interconnects A 0.25 mm x86 microprocessor with a 100 MHz socket 7 interface A 0.20 μm CMOS technology with copper-filled contact and local interconnect A 0.20 μm CMOS technology with copper-filled contact and local interconnect A 0.22mm2 7.25mW per-channel audio stereo-DAC with 97dB-DR and 39dB SNRout A 0.22-mm/sup 2/ 7.25mW per-channel audio stereo-DAC with 97dB DR and 39dB SNR/sub out A 0.22mm2 7.25mW per-channel audio stereo-DAC with 97dB-DR and 39dB SNRout A 0.22mm2 7.25mW per-channel audio stereo-DAC with 97dB-DR and 39dB SNRout A 0.22mm2 7.25mW per-channel audio stereo-DAC with 97dB-DR and 39dB SNRout A 0.22-mm/sup 2/ 7.25mW per-channel audio stereo-DAC with 97dB DR and 39dB SNR/sub out A 0.22-mm/sup 2/ 7.25mW per-channel audio stereo-DAC with 97dB DR and 39dB SNR/sub out A 0.22-mm/sup 2/ 7.25mW per-channel audio stereo-DAC with 97dB DR and 39dB SNR/sub out A 0.22 μm CMOS-SOI technology with a Cu BEOL A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM A 0.2mW 2Mb/s Digital Transceiver Based on Wideband Signaling for Human Body Communications A 0.2°/hr Micro-Gyroscope with Automatic CMOS Mode Matching A 0.2°/hr Micro-Gyroscope with Automatic CMOS Mode Matching A 0.22 μm CMOS-SOI technology with a Cu BEOL A 0.25 μm CMOS transceiver front-end for GSM A 0.2 V, 480 kb subthreshold SRAM with 1 k cells per bitline for ultra-low-voltage computing A 0.25 μm SiGe receiver front-end for 5 GHz applications A 0.25 μm SiGe receiver front-end for 5GHz applications A 0.28-0.8V 320 fW D-latch for sub-VT memories in 65 nm CMOS A 0.29-μm/sup 2/ MIM-CROWN cell and process technologies for 1-gigabit DRAMs A 0.22 μm CMOS-SOI technology with a Cu BEOL A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM A 0.25 _m CMOS LNA with local impedance matching A 0.3 THz Radiating Active $\times{\hbox{27}}$ Frequency Multiplier Chain With 1 mW Radiated Power in CMOS 65-nm A 0.24 μm SiGe BiCMOS technology featuring 6.5V CMOS, fT/fMAX of 15/14 GHz VPNP, and fT/fMAX of 60/125 GHz HBT A 0.24 μm SiGe BiCMOS mixed-signal RF production technology featuring a 47 GHz f/sub t/ HBT and 0.18 μm L/sub ett/ CMOS A 0.24 μm SiGe BiCMOS technology featuring 6.5V CMOS, fT/fMAX of 15/14 GHz VPNP, and fT/fMAX of 60/125 GHz HBT A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM A 0.22 μm CMOS-SOI technology with a Cu BEOL A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication A 0.2V 16Kb 9T SRAM with bitline leakage equalization and CAM-assisted write performance boosting for improving energy efficiency A 0.25-V 28-nW 58-dB Dynamic Range Asynchronous Delta Sigma Modulator in 130-nm Digital CMOS Process A 0.24+0.18 M  double-lined eclipsing binary from the HATSouth survey A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM A 0.3 V Cross-Coupled VCO Using Dynamic Threshold MOSFET A 0.3 V floating-gate differential amplifier input stage with tunable gain A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM A 0.22 μm CMOS-SOI technology with a Cu BEOL A 0.28 THz Power-Generation and Beam-Steering Array in CMOS Based on Distributed Active Radiators A 0.27 mm 2 13.5 dBm 2.4 GHz all-digital polar transmitter using 34\%-efficiency class-D DPA in 40nm CMOS A 0.20 mm 2 3 nW Signal Acquisition IC for Miniature Sensor Nodes in 65 nm CMOS A 0.29-μm/sup 2/ MIM-CROWN cell and process technologies for 1-gigabit DRAMs A 0.25μm CMOS Downconverter Mixer for 1.6 GHz A 0.25-V 22-nS symmetrical bulk-driven OTA for low-frequency $$G_m$$ G m -C applications in 130-nm digital CMOS process A 0.3-V 37-nW 53-dB SNDR Asynchronous Delta-Sigma Modulator in 0.18-μm CMOS A 0.22-0.89 mW Low-power and Highly-secure Always-on Face Recognition Processor with Adversarial Attack Prevention A 0.25 μm inner sidewall-assisted super self-aligned gate heterojunction FET fabricated using all dry-etching technology for low voltage controlled LSIs A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining A 0.25 μm SiGe receiver front-end for 5GHz applications A 0.3 V floating-gate differential amplifier input stage with tunable gain A 0.25 _m CMOS LNA with local impedance matching A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication A 0.2-V Three-Winding Transformer-Based DCO in 16-nm FinFET CMOS A 0.2–0.5 THz single-band heterodyne receiver based on a photonic local oscillator and a superconductor-insulator-superconductor mixer A 0.2–0.5 THz heterodyne receiver based on a photonic local oscillator and a superconductor-insulator-superconductor mixer A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM A 0.22 μm CMOS-SOI technology with a Cu BEOL A 0.2$-\hbox{1.2}$ V DC/DC Boost Converter for Power Harvesting Applications A 0.2V–1.2V converter for power harvesting applications A 0.2―1.2 V DC/DC Boost Converter for Power Harvesting Applications A 0.23 mW, On-Chip, self-calibrating RF amplitude detector in 65 nm CMOS A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS A 0.23 $\mu \text{W}$ , 96 mV Input Voltage DC–DC Converter for Body Sensor Nodes A 0.24 to 2.4 GHz phase-locked loop with low supply sensitivity in 0.18-µm CMOS A 0.2 μm Emitter Bipolar Technology for Low Cost and High Performance Mixed Analog/Digital Applications A 0.3 V PNN Based 10T SRAM with Pulse Control Based Read-Assist and Write Data-Aware Schemes for Low Power Applications A 0.25 V 97.8 fJ/c.-s. 86.5 dB SNDR SC ΔΣ modulator in 0.13µm CMOS A 0.22 pJ/step subsampling ADC with fast input-tracking sampling and simplified opamp sharing A 0.22 pJ/step subsampling ADC with fast input-tracking sampling and simplified opamp sharing A 0.3-MW/Ch 1.25 V Piezo-Resistance Digital ROIC for Liquid-Dispensing MEMS A 0.28 GHz to 3.84 GHz low power differential ring oscillator design using cross-coupled transistors for radio frequency identification (RFID) A 0.2-2 GHz 12 mW multiplying DLL for low-jitter clock synthesis in highly-integrated data communication chips A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS A 0.2V 492nW VCO-based OTA with 60kHz UGB and 207 μVrms noise A 0.25 μm CMOS technology with 45 Å NO-nitrided oxide A 0.23mm2 free coil ZigBee receiver based on a bond-wire self-oscillating mixer A 0.23mm2 free coil ZigBee receiver based on a bond-wire self-oscillating mixer A 0.2V 16Kb 9T SRAM with bitline leakage equalization and CAM-assisted write performance boosting for improving energy efficiency A ±0.3 ppm Oven-Controlled MEMS Oscillator Using Structural Resistance-Based Temperature Sensing A 0.25-mm CMOS, 7-ppm/°C, 8-mA quiescent current, ±5-mA output current low-dropout voltage regulator A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate A 0.25 mm x86 microprocessor with a 100 MHz socket 7 interface A 0.3-kb fragment containing the R-U5-5′ leader sequence is essential for the induction of spongiform neurodegeneration by A8 murine leukemia virus A 0.25 μm CMOS SOI technology and its application to 4 Mb SRAM A 0.22 μm CMOS-SOI technology with a Cu BEOL A 0.3-mW/Ch 1.25 V Piezo-Resistance Digital ROIC for Liquid-Dispensing MEMS ×Close Log In Log in with Facebook Log in with Google or Email Password Remember me on this computer or reset password Enter the email address you signed up with and we'll email you a reset link. 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