Designing multi-socket systems using silicon photonics - CORE CORE Search Search Services Access to raw data API Dataset FastSync Content discovery Recommender Discovery Managing content Repository dashboard Support FAQs About About CORE Blog Contact us Designing multi-socket systems using silicon photonics By Scott Beamer, Christopher Batten and Ajay Joshi Abstract Future single-board multi-socket systems may be unable to deliver the needed memory bandwidth electrically due to power limitations, which will hurt their ability to drive per-formance improvements. Energy efficient off-chip silicon photonics could be used to deliver the needed bandwidth, and it could be extended on-chip to create a relatively flat network topology. That flat network may make it possi-ble to implement the same number of cores with a greater number of smaller dies for a cost advantage with negligible performance degradation Topics: Categories and Subject Descriptors, B.4.3 [Computer Systems Organization, Processor Architectures[Parallel Ar- chitectures] General Terms, Design, Economics, Performance Keywords, Silicon Photonics, Multi-socket Year: 2009 OAI identifier: oai:CiteSeerX.psu:10.1.1.711.2278 Provided by: CiteSeerX Download PDF: Sorry, we are unable to provide the full text but you may find it at the following location(s): http://www.csl.cornell.edu/%7E... (external link) http://www.csl.cornell.edu/%7E... (external link) http://citeseerx.ist.psu.edu/v... (external link) Suggested articles To submit an update or takedown request for this paper, please submit an Update/Correction/Removal Request. Useful links Blog Services About CORE Contact us Cookies Privacy notice Writing about CORE? Discover our research outputs and cite our work. CORE is a not-for-profit service delivered by the Open University and Jisc.
