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More MIPS: Recursion Computer Science 104 Lecture 9 2 © Andrew D. Hilton / Alvin R. Lebeck CPS 104 Homework • Homework 1: graded. 50% As, 27% Bs • Homework 2: Due Wed Midterm 1 • This Wed • 1 page of notes Admin 3 © Andrew D. Hilton / Alvin R. Lebeck Last time… What did we do last time? CPS 104 4 © Andrew D. Hilton / Alvin R. Lebeck Last time… What did we do last time? • More MIPS! • Functions: − jal − jr − Calling conventions − Stack Frames, saving registers • Worked “bubble sort” example CPS 104 5 © Andrew D. Hilton / Alvin R. Lebeck CPS 104 0 zero constant 0 1 at reserved for assembler 2 v0 expression evaluation & 3 v1 function results 4 a0 arguments 5 a1 6 a2 7 a3 8 t0 temporary: caller saves . . . 15 t7 16 s0 callee saves . . . 23 s7 24 t8 temporary (cont’d) 25 t9 26 k0 reserved for OS kernel 27 k1 28 gp Pointer to global area 29 sp Stack pointer 30 fp frame pointer 31 ra Return Address (HW) Review: MIPS Registers 6 © Andrew D. Hilton / Alvin R. Lebeck CPS 104 Review: Calling a function Calling Procedure Step-1: Setup the arguments: • The first four arguments (arg0-arg3) are passed in registers $a0-$a3 • Remaining arguments are pushed onto the stack (in reverse order arg5 is at the top of the stack). Step-2: Save caller-saved registers • Save registers $t0-$t9 if they contain live values at the call site. Step-3: Execute a jal instruction. 7 © Andrew D. Hilton / Alvin R. Lebeck CPS 104 Review: Callee setup Called Routine Step-1: Establish stack frame. • Subtract the frame size from the stack pointer. addiu $sp, $sp, - • Typically, minimum frame size is 32 bytes (8 words). Step-2: Save callee saved registers in the frame. • Register $fp is always saved. • Register $ra is saved if routine makes a call. • Registers $s0-$s7 are saved if they are used. Step-3: Establish Frame pointer • Add the stack - 4 to the address in $sp addiu $fp, $sp, - 4 8 © Andrew D. Hilton / Alvin R. Lebeck CPS 104 Review: Returning On return from a call Step-1: Put returned values in registers $v0. (if a value is returned) Step-2: Restore callee-saved registers. • Restore $fp and other saved registers. [$ra, $s0 - $s7] Step-3: Pop the stack • Add the frame size to $sp. addiu $sp, $sp, Step-4: Return • Jump to the address in $ra. jr $ra 9 © Andrew D. Hilton / Alvin R. Lebeck Today More MIPS! • Recursion Won’t be required on the exam… • But you could use recursion if you want… • And good MIPSing practice anyways Extra time? • I’ll work example problems, answer review questions, etc… CPS 104 10 © Andrew D. Hilton / Alvin R. Lebeck Recursion Why do we want recursion? • Because recursion is a wonderful thing! Canonical recursion example? • Factorial CPS 104 11 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int x = fact(3); CPS 104 12 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? 13 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 14 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 15 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 C1 factorial n 2 return C1 16 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 C1 factorial n 2 return C1 17 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 C1 factorial n 2 return C1 factorial n 1 return C1 18 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 C1 factorial n 2 return C1 factorial n 1 return C1 19 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 C1 factorial n 2 return C1 factorial n 1 return C1 factorial n 0 return C1 20 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 C1 factorial n 2 return C1 factorial n 1 return C1 factorial n 0 return C1 21 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 C1 factorial n 2 return C1 factorial n 1 return C1 fact returned 1 22 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 C1 factorial n 2 return C1 fact returned 1 23 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x ??? C0 factorial n 3 return C0 fact returned 2 24 © Andrew D. Hilton / Alvin R. Lebeck Factorial in C int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 main x 6 25 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 Observe: Parameter n in $a0 Need to put n-1 in $a0 to call Need n after call 26 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 Observe: Parameter n in $a0 Need to put n-1 in $a0 to call Need n after call Conclusion: Need to move n to other reg Which one: $t0 or $s0? 27 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 Observe: Parameter n in $a0 Need to put n-1 in $a0 to call Need n after call Conclusion: Need to move n to other reg Which one: $t0 or $s0? Would need save/restore => May as well use $s0 28 © Andrew D. Hilton / Alvin R. Lebeck Convert C to Assembly int fact (int n) { if (n <= 0) { return 1; } return n * fact (n – 1); } … int main (void) { int x = fact(3); … CPS 104 (We’ll switch to emacs For this part) 29 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0003 $s0 1234 $v0 ABCD $sp FF80 $fp FFCC $ra 4000 Addr Value FF7C FF78 FF74 FF70 FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 30 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> addiu $sp, $sp, -16 sw $fp, 0($sp) sw $ra, 4($sp) sw $s0, 8($sp) addiu $fp, $sp, 12 CPS 104 Reg Value $a0 0003 $s0 1234 $v0 ABCD $sp FF80 $fp FFCC $ra 4000 Addr Value FF7C FF78 FF74 FF70 FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 31 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> addiu $sp, $sp, -16 sw $fp, 0($sp) sw $ra, 4($sp) sw $s0, 8($sp) addiu $fp, $sp, 12 CPS 104 Reg Value $a0 0003 $s0 1234 $v0 ABCD $sp FF70 $fp FFCC $ra 4000 Addr Value FF7C FF78 FF74 FF70 FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 32 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> addiu $sp, $sp, -16 sw $fp, 0($sp) sw $ra, 4($sp) sw $s0, 8($sp) addiu $fp, $sp, 12 CPS 104 Reg Value $a0 0003 $s0 1234 $v0 ABCD $sp FF70 $fp FFCC $ra 4000 Addr Value FF7C FF78 FF74 FF70 FFCC FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 33 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> addiu $sp, $sp, -16 sw $fp, 0($sp) sw $ra, 4($sp) sw $s0, 8($sp) addiu $fp, $sp, 12 CPS 104 Reg Value $a0 0003 $s0 1234 $v0 ABCD $sp FF70 $fp FFCC $ra 4000 Addr Value FF7C FF78 FF74 4000 FF70 FFCC FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 34 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> addiu $sp, $sp, -16 sw $fp, 0($sp) sw $ra, 4($sp) sw $s0, 8($sp) addiu $fp, $sp, 12 CPS 104 Reg Value $a0 0003 $s0 1234 $v0 ABCD $sp FF70 $fp FFCC $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 35 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> addiu $sp, $sp, -16 sw $fp, 0($sp) sw $ra, 4($sp) sw $s0, 8($sp) addiu $fp, $sp, 12 CPS 104 Reg Value $a0 0003 $s0 1234 $v0 ABCD $sp FF70 $fp FF7C $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 36 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0003 $s0 1234 $v0 ABCD $sp FF70 $fp FF7C $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 37 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0003 $s0 0003 $v0 ABCD $sp FF70 $fp FF7C $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 38 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0003 $s0 0003 $v0 ABCD $sp FF70 $fp FF7C $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 39 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0002 $s0 0003 $v0 ABCD $sp FF70 $fp FF7C $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 40 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0002 $s0 0003 $v0 ABCD $sp FF70 $fp FF7C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 FF64 FF60 FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 41 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0002 $s0 0003 $v0 ABCD $sp FF60 $fp FF6C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 42 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0002 $s0 0002 $v0 ABCD $sp FF60 $fp FF6C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 43 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0002 $s0 0002 $v0 ABCD $sp FF60 $fp FF6C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 44 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0001 $s0 0002 $v0 ABCD $sp FF60 $fp FF6C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 45 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0001 $s0 0002 $v0 ABCD $sp FF60 $fp FF6C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 FF54 FF50 FF4C FF48 FF44 FF40 46 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0001 $s0 0002 $v0 ABCD $sp FF50 $fp FF5C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 FF44 FF40 47 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0001 $s0 0001 $v0 ABCD $sp FF50 $fp FF5C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 FF44 FF40 48 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0001 $s0 0001 $v0 ABCD $sp FF50 $fp FF5C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 FF44 FF40 49 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0001 $v0 ABCD $sp FF50 $fp FF5C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 FF44 FF40 50 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0001 $v0 ABCD $sp FF50 $fp FF5C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 FF44 FF40 51 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0001 $v0 ABCD $sp FF40 $fp FF4C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 52 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0000 $v0 ABCD $sp FF40 $fp FF4C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 53 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0000 $v0 ABCD $sp FF40 $fp FF4C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 54 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0000 $v0 0001 $sp FF40 $fp FF4C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 55 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0000 $v0 0001 $sp FF40 $fp FF4C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 56 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> lw $s0, 8($sp) lw $ra, 4($sp) lw $fp, 0($sp) addiu $sp, $sp, 16 CPS 104 Reg Value $a0 0000 $s0 0000 $v0 0001 $sp FF40 $fp FF4C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 57 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> lw $s0, 8($sp) lw $ra, 4($sp) lw $fp, 0($sp) addiu $sp, $sp, 16 CPS 104 Reg Value $a0 0000 $s0 0001 $v0 0001 $sp FF40 $fp FF4C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 58 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> lw $s0, 8($sp) lw $ra, 4($sp) lw $fp, 0($sp) addiu $sp, $sp, 16 CPS 104 Reg Value $a0 0000 $s0 0001 $v0 0001 $sp FF40 $fp FF4C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 59 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> lw $s0, 8($sp) lw $ra, 4($sp) lw $fp, 0($sp) addiu $sp, $sp, 16 CPS 104 Reg Value $a0 0000 $s0 0001 $v0 0001 $sp FF40 $fp FF5C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 60 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> lw $s0, 8($sp) lw $ra, 4($sp) lw $fp, 0($sp) addiu $sp, $sp, 16 CPS 104 Reg Value $a0 0000 $s0 0001 $v0 0001 $sp FF50 $fp FF5C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C Notice how $sp and $fp describe the callers frame now 61 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0001 $v0 0001 $sp FF50 $fp FF5C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 62 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0001 $v0 0001 $sp FF50 $fp FF5C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 63 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0001 $v0 0001 $sp FF50 $fp FF5C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 64 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0002 $v0 0001 $sp FF60 $fp FF6C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 65 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0002 $v0 0001 $sp FF60 $fp FF6C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 66 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0002 $v0 0002 $sp FF60 $fp FF6C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 67 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0003 $v0 0002 $sp FF70 $fp FF7C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 68 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0003 $v0 0002 $sp FF70 $fp FF7C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 69 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 0003 $v0 0006 $sp FF70 $fp FF7C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 70 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> lw $s0, 8($sp) lw $ra, 4($sp) lw $fp, 0($sp) addiu $sp, $sp, 16 CPS 104 Reg Value $a0 0000 $s0 0003 $v0 0006 $sp FF70 $fp FF7C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 71 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> lw $s0, 8($sp) lw $ra, 4($sp) lw $fp, 0($sp) addiu $sp, $sp, 16 CPS 104 Reg Value $a0 0000 $s0 1234 $v0 0006 $sp FF70 $fp FF7C $ra 1044 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 72 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> lw $s0, 8($sp) lw $ra, 4($sp) lw $fp, 0($sp) addiu $sp, $sp, 16 CPS 104 Reg Value $a0 0000 $s0 1234 $v0 0006 $sp FF70 $fp FF7C $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 73 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> lw $s0, 8($sp) lw $ra, 4($sp) lw $fp, 0($sp) addiu $sp, $sp, 16 CPS 104 Reg Value $a0 0000 $s0 1234 $v0 0006 $sp FF70 $fp FFCC $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 74 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly <> lw $s0, 8($sp) lw $ra, 4($sp) lw $fp, 0($sp) addiu $sp, $sp, 16 CPS 104 Reg Value $a0 0000 $s0 1234 $v0 0006 $sp FF80 $fp FFCC $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 75 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly fact: <> move $s0, $a0 blez $s0, factEndZero addi $a0, $a0, -1 jal fact # Addr 1040 mul $v0, $v0, $s0 factRet: <> jr $ra factEndZero: li $v0, 1 b factRet CPS 104 Reg Value $a0 0000 $s0 1234 $v0 0006 $sp FF80 $fp FFCC $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C 76 © Andrew D. Hilton / Alvin R. Lebeck Factorial in Assembly main: … … … li $a0, 3 jal fact move $a0, $v0 … … CPS 104 Reg Value $a0 0000 $s0 1234 $v0 0006 $sp FF80 $fp FFCC $ra 4000 Addr Value FF7C FF78 1234 FF74 4000 FF70 FFCC FF6C FF68 0003 FF64 1044 FF60 FF7C FF5C FF58 0002 FF54 1044 FF50 FF6C FF4C FF48 0001 FF44 1044 FF40 FF5C Value returned in $v0 Stack /callee saves restored 77 © Andrew D. Hilton / Alvin R. Lebeck Recursion De-mystified? Recursion: • Assembly: not required on midterm1 • Generally good to know • Hopefully de-mystified? • P.S. Some languages only have recursion… CPS 104 78 © Andrew D. Hilton / Alvin R. Lebeck Other ISAs We’ve been studying MIPS • x86: Intel, AMD—very common, kind of ugly − Variable length insns (1-22 bytes) − Very complex insns − Not a load-store ISA (can do mem + reg -> mem) • PowerPC—more like MIPS (“RISC”) − Has some not-so RISC things: load-with-update • ARM • … Good to know others exist, but our focus is MIPS CPS 104 79 © Andrew D. Hilton / Alvin R. Lebeck Remaining Time: Work Examples, Answer ?s With any remaining time I’ll • Work examples (write C, asm, do binary math..) • Answer questions • Whatever…. CPS 104